According to xFusion, the next generation of artificial intelligence infrastructure will have to face three constraints simultaneously: cooling, power supply, and interconnection. The company detailed these challenges at the OCP Global Summit 2026 in San Jose, in a presentation by Arthur Wang, xFusion’s Director of Product Management.
According to the figures presented, an accelerator rack consumed about 20 kW in 2023, with a dissipation of about 350 W per chip. In 2025, racks reach 120 kW and processors exceed 1,000 W. The generation delivered in 2026 brings racks to 240 kW and chips beyond 2,000 W. The next generation, already in validation with several hyperscalers, targets racks on the order of a megawatt, chips over 3,000 W, and heat flux densities exceeding 200 W/cm².
The Thermal Wall
For these densities, air cooling is no longer sufficient, and the solution chosen by xFusion is direct liquid cooling with cold plates. The company uses diamond-copper composite plates, whose equivalent thermal conductivity exceeds 650 W/m·K, compared to 385 to 400 W/m·K for pure copper. According to xFusion, the cooling capacity of a single chip exceeds 4,000 W, representing about a 33% margin above the 3,000 W generation.
xFusion also presents five thermal interface and dissipation materials, each suited to a compromise between cost and performance, including graphene pads (130 W/m·K) and a liquid metal (30 W/m·K). The company is also developing two-phase jet cooling, which exploits the liquid’s change of state to drastically reduce the required fluid flow rate. It acknowledges that large-scale sealing and pressure management remain challenges. For current deployments, its FusionPod for AI V8, a modular 42U rack with power up to 155 kW, operates with a distributed CDU architecture, without modifying secondary circuits.
The Power Wall
Cooling and power supply are inseparable, as every watt delivered to a chip ends up as heat. With a current 54 V distribution, the current becomes considerable: 185 A for a 10 kW rack, 18,519 A for a 1 MW rack. Joule losses in copper busbars increase with the square of the current, and xFusion estimates that at 1 MW, they can exceed 50 kW.
The solution involves moving to higher voltage, towards 800 V DC. According to the company, this shift reduces current by about 15 times and I²R losses by about 220 times, while overall system efficiency would improve from 88% to over 90%. xFusion is developing a prototype power supply unit for this, the 800V HVDC Sidecar, designed for configurations from 300 kW to 1.2 MW per rack, and relies on wide-bandgap semiconductors, notably SiC MOSFETs and GaN HEMTs.
The Interconnection Wall
The third wall concerns electrical signals on copper at 224 Gbit/s per lane, already nearing their integrity limits. The company states it has commercially deployed high-density orthogonal 224G backplanes and is conducting preliminary research on 448G. It also highlights co-packaged optics, which place photonic engines near the switch silicon. Its Super Node architecture, liquid-cooled, supports up to 240 kW per rack, 128 XPUs per cabinet, and 256 XPUs across two cabinets.
For xFusion, these three constraints combine: an 800 V power supply paired with an insufficient optical network would leave GPUs waiting for data. Quoting Arthur Wang, the company summarizes the challenge as follows: ‘In the agentic era, competitiveness is not about how many chips you own. It’s about the real economic value you can extract from every watt and every joule of heat.’ xFusion presents this idea as a value chain, WATT → FLOPS → TOKEN → AGENT → VALUE, in which each step incurs conversion losses.
